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VLSI BackEnd Engineer at Marvell Semiconductor.
• Extensive Backend / Physical Design experience - RTL to GDS, full Backend design flow. • Working experience [Hands on] and deep extensive knowledge of several Backend tools and systems: Design Compiler (DCT), Logic Equivalent (Verplex), ICC & ICC_DP, Innovus , Calibre (LVS/DRC), Prime Time (PT_SI). • Deep knowledge of all design stages: Floor Planning, Placement, STA, CTS, Routing, DFM and ECO flows. • Full Chip flow Physical Design experience: from building cell libraries, Floor Plan design to Tape Out. • Consulting and technical support for many VLSI customers in Israel through Physical Design stages and transition to new development tools, Backend methodologies & flows. • Development and teaching Synopsys Place & Route courses (ICC). • Physical Design Group Management experience. • Teaching and educating new employees in Physical Design tools and flows. • Excellent communications skills, self & fast learner, high motivated, independent as well as a team player, dedicated , ability to manage priorities and multitasking.
Marvell Semiconductor.
VLSI BackEnd Engineer
January 1, 2011 – Present
Marvell (Yokneam)
Plurality Ltd
ASIC BackEnd Leader
January 1, 2009 – November 1, 2010
Synopsys
VLSI BackEnd Application Engineer
January 1, 2001 – January 1, 2009
Avanti
Application Engineer
January 1, 2001 – January 1, 2002
Intel
Physical Design
January 1, 1991 – January 1, 2001
Visonic Ltd
Final verification and quality checks
January 1, 1988 – January 1, 1991
Cultural Fit Analysis
The candidate has a long and stable career history with major semiconductor companies (Intel, Synopsys, Marvell), indicating loyalty and adaptability to different corporate cultures. The diverse roles from hands-on engineering to application support and leadership demonstrate a broad professional scope. However, the target role is 'FPGA Developer', and the resume heavily emphasizes ASIC Backend. While there's significant overlap in digital design principles, direct FPGA development experience is not explicitly detailed, which might require a cultural shift or upskilling for the target role.
Soft Skills & Operational Fit
The candidate's experience as an 'ASIC BackEnd Leader' and 'VLSI BackEnd Application Engineer' suggests strong leadership, mentoring, and customer support skills. The description of managing chip revisions and training new employees at Intel indicates good operational fit and ability to handle complex project management. The role at Plurality Ltd involved customer support and supervising outsourcing, pointing to strong collaboration and communication skills.