Shiv

FPGA Developer

https://talent.gravityer.com/shiv-9

Philadelphia, PanamaMember since June 28, 2026

Key Strengths

Demonstrated interest in hardware description languages through the 'Five-Stage-Pipelined-CPU-Final-Project-Verilog' project.
Experience with Verilog, which is directly relevant to an FPGA Developer role.
Personal projects indicate a proactive learning approach and self-motivation.

Cultural & Operational Fit

Cultural Fit Analysis

The candidate's personal projects show a diverse interest in various technologies (Verilog, Python, Shell, HTML/CSS/JS), indicating adaptability and a willingness to explore different domains. The focus on a CPU design project in Verilog aligns well with the target FPGA Developer role, suggesting a genuine interest in the field.

Soft Skills & Operational Fit

Insufficient data to assess soft skills and operational fit. No psychometric test results or interview feedback are available.

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Evaluating your skill match against the job requirements…

Assessing your cultural and operational fit

Projects

Pi-dashboard

February 15, 2026 – Present

Pi-dashboard — GitHub repository

View Project

shivpvtel.github.io

June 28, 2025 – June 28, 2025

shivpvtel.github.io — GitHub repository

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zsh-config

June 26, 2025 – June 26, 2025

terminal configuration

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famtree

October 22, 2024 – October 22, 2024

famtree — GitHub repository

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431FinalProject

April 24, 2024 – April 25, 2024

431FinalProject — GitHub repository

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431Project2

April 20, 2024 – April 20, 2024

431Project2 — GitHub repository

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SillyGame

April 17, 2024 – April 17, 2024

Hahahaha just a silly goofy game

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rise24

April 8, 2024 – April 11, 2024

Rockets4Schools Payload Code

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PyQt6

March 12, 2024 – June 10, 2024

Martin Fitzpatrick - Create GUI Applications with Python & Qt6 (PyQt6 Edition)

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Five-Stage-Pipelined-CPU-Final-Project-Verilog

September 21, 2022 – September 21, 2022

Five-Stage-Pipelined-CPU-Final-Project-Verilog — GitHub repository

View Project

Key Strengths

Demonstrated interest in hardware description languages through the 'Five-Stage-Pipelined-CPU-Final-Project-Verilog' project.
Experience with Verilog, which is directly relevant to an FPGA Developer role.
Personal projects indicate a proactive learning approach and self-motivation.

Cultural & Operational Fit

Cultural Fit Analysis

Soft Skills & Operational Fit

Insufficient data to assess soft skills and operational fit. No psychometric test results or interview feedback are available.

Shiv

Key Strengths

Cultural & Operational Fit

Top Skills

Skills

Projects

Key Strengths

Cultural & Operational Fit