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Senior Lead Engineer at Qualcomm | Electrical Validation | Functional Validation | IP Validation | SoC Validation | ARM | Semiconductor Industry
Post silicon Validation Engineer, Team Lead Experienced, with a background in SoC validation (functional and electrical), Experienced in Embedded software development lifecycle specialised in Automotive functional safety security domine R&D, worked in Critical projects as verification and validation Engineer for multiple IP's Including ASIL-D to QM components. Languages/Framework: Embedded C, Assembly, Python, Perl, JSON, Powershell. Others: Lauterbach Trace32, Docker, Enterprice Architect, JIRA, EB Tresos, GNU debugger. Version Control: Git, Gerrit, IBM clear case, Bit Bucket.
Vector India Embedded Training Institute
Embedded software development
January 1, 2017 – Present
Dayananda Sagar College Of Engineering, Bangalore
Master of Technology (M.Tech.), VLSI Design and Embedded Systems
January 1, 2014 – January 1, 2016
Qualcomm
Senior Lead Engineer
December 1, 2024 – Present
Bengaluru, Karnataka, India · Hybrid
Intel Corporation
Post Silicon Validation Engineer
May 1, 2022 – November 1, 2024
Bengaluru, Karnataka, India
NXP Semiconductors
V&V/Test Engineer - II
July 1, 2021 – April 1, 2022
Bangalore Urban, Karnataka, India
Robert Bosch Engineering and Business Solutions Private Limited
Senior Software Engineer
May 1, 2019 – June 1, 2021
Bangalore
Infineon Technologies
Software Engineer
December 1, 2017 – April 1, 2019
Bangalore
Aeronautical Development Agency
Internship Trainee
August 1, 2015 – February 1, 2016
Bengaluru Area, India
Adyanta technologies
Freelance
July 1, 2013 – July 1, 2014
Shivamoga, Karnataka, India
Efficient VLSI Design for Image zooming using Bilinear Zoom Technique
September 1, 2015 – Present
In this project Proposed an Image Zooming of a bilinear ZOOM Technique method is been used to improve the quality of the Scaled image. Image scaling processor is using VLSI technique. A high quality algorithm is proposed which includes sharpening spatial filter and clamp filter used as a combined filter to pre-process the image before interpolating. This increases the quality of the image and as well reduces the drawbacks such as alia singartefacts produced from bilinear interpolator. Reduction in the bilinear interpolation computation results in lesser area for the design in VLSI intern increases the speed and reduces power, cost of overall implementation
Intelligent Agricultural Robot
October 1, 2013 – April 1, 2014
Intelligent Agricultural Robot (IAR) is to help the farmers in such a way that by reducing human laborers. Since nowadays farmers are facing acute shortage of labor problems.
Embedded surveillance system with PIR and Ultrasonic sensors.
May 1, 2013 – Present
The Embedded surveillance system with PIR and Ultrasonic sensors using Enhancement Probability sensing method provides an Rich set of securityTo customers with multiple sensing operations.
Industrial health monitoring System with voice output
April 1, 2010 – Present
This Project will facilitate the industrial environment by detecting the Temperature, water and voltage level which will be manually monitored by the end operator
Embedded systems development engineer
Vector India Pvt. Ltd.
June 23, 2026 – Present
ISO 26262 - Software methods used to achieve an ASIL
Infineon Technologies
June 23, 2026 – Present
CANoe Fundamentals Workshop
VECTOR Informatik
June 23, 2026 – Present
Cultural Fit Analysis
The candidate's project diversity, ranging from VLSI design to embedded surveillance and agricultural robots, indicates a broad interest in embedded systems applications. The progression through roles at prominent companies like Infineon, Bosch, NXP, and Intel, culminating in a Senior Lead Engineer role at Qualcomm, suggests adaptability and a drive for career growth within the semiconductor and embedded domain. The certifications in CANoe and ISO 26262 further demonstrate a commitment to industry standards and continuous learning, which are positive indicators for cultural fit in a technically demanding environment. However, the lack of explicit team collaboration or leadership examples in the provided descriptions makes it difficult to fully assess collaborative cultural fit beyond technical contributions.
Soft Skills & Operational Fit
The candidate's experience descriptions indicate a structured approach to validation and development, including requirement analysis, test case development, defect analysis, and code review. Involvement in automation tool development suggests an inclination towards efficiency and process improvement. The roles held at major semiconductor companies (Intel, NXP, Infineon, Qualcomm) demonstrate experience in large-scale, complex engineering environments, which aligns with operational fit for a senior role.