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Senior Physical Designer - FullChip RTL to GDS
AI is analyzing your overall score…
Identifying your key strengths…
Evaluating your skill match against the job requirements…
Assessing your cultural and operational fit
MDA Space
Senior Physical Design Engineer
July 1, 2025 – Present
Farnborough, England, United Kingdom · On-site
SATIXFY UK LIMITED
Fullchip Physical design
August 1, 2024 – July 1, 2025
Farnborough, England, United Kingdom · On-site
SatixFy
Backend Eng.
February 1, 2019 – August 1, 2024
Manof
MultiPhy
Backend Engineer
September 1, 2018 – January 1, 2019
Israel
Qualcomm
Backend Engineer
August 1, 2016 – August 1, 2018
Intel Corporation
Backend Engineer
August 1, 1994 – July 1, 2016
Intel Corporation
Backend Engineer
August 1, 1994 – July 1, 2016
Cultural Fit Analysis
The candidate has a long history in backend engineering and physical design within the semiconductor industry. While the target role is 'FPGA Developer', the candidate's experience is heavily focused on ASIC backend, which has significant overlap but also distinct differences. The lack of explicit FPGA project experience or skills on the resume suggests a potential gap. The candidate's career progression shows stability and commitment to the hardware design domain.
Soft Skills & Operational Fit
Insufficient data to assess soft skills and operational fit. The candidate's resume primarily lists technical roles without descriptions of collaborative projects, leadership, or problem-solving approaches.