Rohan Dvivedi

FPGA Developer

https://talent.gravityer.com/rohan-dvivedi

Software and Hardware developer

Akashx

Key Strengths

Extensive personal project experience in C/C++ for embedded systems and low-level programming, highly relevant for FPGA development.
Demonstrated experience with Verilog for FPGA projects (FpgaPWMcontroller).
Strong background in fundamental computer science concepts like memory management (Slabby), database engines (RhenDB, MinTxEngine), and networking (Serc, HTTPparser).
Experience with build systems like Makefiles and CMake.

Cultural & Operational Fit

Cultural Fit Analysis

The candidate's project portfolio shows a strong inclination towards independent, deep technical work on foundational systems. The current role as 'FPGA Developer' aligns well with the target role. However, the lack of team-based projects or collaborative experience in the provided data makes it difficult to assess cultural fit beyond individual technical contribution.

Soft Skills & Operational Fit

Insufficient data to assess soft skills and operational fit. The candidate's project descriptions indicate a strong drive for self-learning and building complex systems from scratch.

AI is analyzing your overall score…

Identifying your key strengths…

Evaluating your skill match against the job requirements…

Assessing your cultural and operational fit

Projects

RhenDB

January 2, 2025 – Present

A new relational database storage engine, built on top of TupleIndexer, VolatilePageStore and MinTxEngine.

View Project

MinTxEngine

September 22, 2024 – Present

ACID compliant, ARIES-like-fully-recoverable Mini Transaction Engine, for building your next biggest database storage engine.

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HTTPparser

December 28, 2021 – Present

An HTTP parsing library in C.

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Slabby

June 2, 2020 – Present

A slab memory allocator in C.

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FpgaPWMcontroller

May 19, 2020 – May 19, 2020

Motor PWM Controller on FPGA in Verilog

View Project

quadF32

March 19, 2020 – May 10, 2021

Flight controller firmware.

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Bufferpool

January 24, 2020 – Present

A user-space buffer pool manager library in C for building a HDD/SSD based database storage engine.

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quadF

October 6, 2019 – March 2, 2021

Quadcopter project using ESP32 as flight controller and GY86 as 10DOF (MPU6050 as accl/gyro, hmc5883l as magnetometer and the best of all MS5611 as barometer for height ofcourse)

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Cutlery

May 16, 2019 – Present

A configurable data structures library in C.

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Serc

September 1, 2018 – Present

Serc is a multithreaded web server (/framework) in C language, just as tomcat is to java.

View Project

Key Strengths

Extensive personal project experience in C/C++ for embedded systems and low-level programming, highly relevant for FPGA development.
Demonstrated experience with Verilog for FPGA projects (FpgaPWMcontroller).
Strong background in fundamental computer science concepts like memory management (Slabby), database engines (RhenDB, MinTxEngine), and networking (Serc, HTTPparser).
Experience with build systems like Makefiles and CMake.

Cultural & Operational Fit

Cultural Fit Analysis

Soft Skills & Operational Fit

Insufficient data to assess soft skills and operational fit. The candidate's project descriptions indicate a strong drive for self-learning and building complex systems from scratch.

Rohan Dvivedi

Key Strengths

Cultural & Operational Fit

Top Skills

Skills

Experience

Projects

Key Strengths

Cultural & Operational Fit