
Backend engineer at Marvell Israel Ltd.
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Currently working as a BackEnd physical design engineer at Marvell Israel LTD. Graduated from the Electrical & Computer Engineering Department of Ben Gurion University, Israel. Specialties: HW languages: VHDL, Verilog. SW languages: Perl, unix, Tcl. Familiar with: micro-controllers, FPGA (Altera). Programs: Magma tools, Synopsys tools, Verifications tools, Cadence Virtuoso IC design.
Ben Gurion University of the Negev
B.Sc, Electrical & Computer Engineering
January 1, 2007 – January 1, 2011
Marvell Israel Ltd.
Backend Design Engineer
January 1, 2012 – Present
Petach Tikva
Utilization of a Sub-Threshold (ST) or Near-Threshold (NT) technologies in security applications.
September 1, 2010 – August 1, 2011
Project main goal is to improve encrypted circuit against Leakage Power Analysis attack. We designed a new cell library for this cause, We used 40nm technology. For this project we used Cadence Virtuoso IC design tools. LPA attacks are a serious threat to the information security of cryptographic circuits in sub-100nm technology. These attacks exploit the dependence of the leakage current of CMOS IC on their inputs.
Cultural Fit Analysis
The candidate's experience is highly specialized in backend design engineering and IC security, which aligns with a Package Design Engineer role's technical demands. However, the limited project diversity and lack of explicit collaboration details make a comprehensive cultural fit assessment challenging. The single personal project indicates initiative and deep technical interest.
Soft Skills & Operational Fit
Insufficient data to assess soft skills and operational fit. The psychometric test score is 0, providing no insights.