Jenya Nisanov

As a Physical Design Technical Lead at ProteanTecs, I contribute over 19 years of experience in the semiconductor industry, with expertise in physical design, static timing analysis, and RTL2GDS flows using Synopsys and Cadence tools. My work is grounded in precision and collaboration, delivering efficient, reliable backend design solutions. With a career spanning roles at leading companies such as Intel Corporation and Marvell Semiconductors Israel, I have developed a deep understanding of backend engineering and physical design processes. My goal is to support innovative and high-quality design implementations that align with organizational objectives and foster technological advancement.