Byron Lathi

FPGA Developer

https://talent.gravityer.com/byron-lathi

Member since June 25, 2026

Key Strengths

Extensive personal project experience in Verilog, SystemVerilog, and VHDL, directly relevant to FPGA development.
Demonstrated ability to work with low-level hardware, including SDRAM interfacing and CPU emulation (6502, 4004).
Experience with SystemRDL for hardware description and generation, indicating familiarity with modern design methodologies.
Proficiency in Assembly language, crucial for understanding processor architectures and low-level optimization.

Cultural & Operational Fit

Cultural Fit Analysis

The candidate's project portfolio shows a strong passion for hardware description languages and low-level programming, which aligns well with the technical demands of an FPGA Developer role. The diversity of personal projects, from SDRAM testing to CPU emulation and bus decoder generation, indicates a self-driven and curious individual. However, the lack of team-based or professional experience makes it difficult to assess cultural fit in a collaborative work environment.

Soft Skills & Operational Fit

The provided data does not contain information to assess soft skills or operational fit. All projects are personal, limiting insight into collaboration or professional work habits.

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Assessing your cultural and operational fit

Projects

PeakRDL-BusDecoder

October 11, 2025 – Present

Generate a SystemVerilog bus decoder from SystemRDL that splits CPU interface signals to multiple sub-address spaces.

View Project

6502_qoi

June 26, 2023 – November 5, 2023

Mirror of https://git.byronlathi.com/bslathi19/6502_qoi/

View Project

super6502

March 14, 2022 – October 15, 2024

This is a mirror of my personal gitlab project.

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emu4004

April 13, 2021 – March 6, 2022

emu4004 — GitHub repository

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DE0-SDRAM-Testing

January 25, 2020 – January 27, 2020

Experimenting with the SDRAM built into the DE0 Board. The FPGA does not have enough memory for a full bitmapped screen with a decent amount of colors, so the extra RAM will be necessary for storing all of the data.

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Factory-Game

June 5, 2019 – June 6, 2019

A factorio inspired game for the Apple IIc and IIe

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GloveProject

January 30, 2019 – May 9, 2019

Glove with sensors on it to interact with a computer

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ScoutingServer

October 17, 2016 – October 26, 2016

The server for scouting app

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ScoutingApp

October 13, 2016 – October 26, 2016

An app written in java to help us gather and organize scouting data.

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T-Shirt-Cannon

September 1, 2016 – October 4, 2016

based of of FRC-2016, using the old robot as a T-Shirt cannon.

View Project

Key Strengths

Extensive personal project experience in Verilog, SystemVerilog, and VHDL, directly relevant to FPGA development.
Demonstrated ability to work with low-level hardware, including SDRAM interfacing and CPU emulation (6502, 4004).
Experience with SystemRDL for hardware description and generation, indicating familiarity with modern design methodologies.
Proficiency in Assembly language, crucial for understanding processor architectures and low-level optimization.

Cultural & Operational Fit

Cultural Fit Analysis

Soft Skills & Operational Fit

The provided data does not contain information to assess soft skills or operational fit. All projects are personal, limiting insight into collaboration or professional work habits.

Byron Lathi

Key Strengths

Cultural & Operational Fit

Top Skills

Skills

Projects

Key Strengths

Cultural & Operational Fit