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CoVerify
Data Scientist
June 14, 2026 – Present
VSD_TCL_PROGRAMMING_WORKSHOP
October 21, 2025 – October 26, 2025
Understand how TCL scripting automates ASIC synthesis and timing analysis using Yosys & OpenTimer, with CSV/Excel inputs acting as front-end design descriptors.
View ProjectNASSCOM-RISC-V-based-MYTH-program
March 20, 2025 – April 2, 2025
Learn digital logic design from basics to pipelines using TL-Verilog and Makerchip — fast, practical, and beginner-friendly! 🚀
View ProjectVSD_SQUADRON_MINI_RISCV_RESEARCH_INTERNSHIP
July 20, 2024 – August 25, 2024
A hands-on program focusing on RISC-V development, including tasks from software setup to creating and demonstrating practical application using RISC V processor.
View ProjectNano_Satellite_Design
July 16, 2024 – February 13, 2025
Final Year project on design of a Nano Satellite
View ProjectUniversal-Asynchronous-Receiver-Transmitter
June 28, 2024 – June 28, 2024
Universal-Asynchronous-Receiver-Transmitter — GitHub repository
View ProjectNIELIT-INTERNSHIP-ON-HLS-PROGRAMMING
June 6, 2024 – July 23, 2024
In this VLSI design course, we explored topics such as HLS programming, combination circuits, sequential circuits, and a capstone project. From high-level synthesis to hands-on application, this course covers essential aspects of digital circuit design.
View ProjectNASSCOM-VSD-SoC-design-Program
May 26, 2024 – August 19, 2024
In this workshop, we will delve into the process of designing an Application Specific Integrated Circuit (ASIC) from the Register Transfer Level (RTL) to the Graphical Data System (GDS)
View ProjectMy_Very_first_RTLtoGDS-Project
May 16, 2024 – May 16, 2024
My_Very_first_RTLtoGDS-Project — GitHub repository
View ProjectNeuroLogic-Harmonizing-Digital-Design-and-AI-Neural-Networks
April 6, 2024 – April 9, 2024
NeuroLogic is an ambitious project aimed at bridging the worlds of digital design and artificial intelligence (AI) neural networks, providing a platform for advancing my skills and expertise in both domains.At its core, NeuroLogic offers an immersive experience where I delve into the intricacies of digital design and AI neural networks.
View ProjectCultural Fit Analysis
The candidate's project portfolio is heavily focused on VLSI, digital design, and embedded systems (RISC-V, FPGAs). While there's a stated target role of 'Data Scientist' and one project ('NeuroLogic') mentions AI neural networks, the overall project diversity does not strongly align with a typical Data Scientist profile. The current experience as 'Data Scientist' at CoVerify is listed with a future start date (2026), suggesting this is a prospective role rather than current experience. This creates a significant gap in demonstrated data science skills and experience, impacting cultural fit for a pure Data Scientist role.
Soft Skills & Operational Fit
The candidate's project descriptions are generally clear, indicating good communication in written form. However, without psychometric test results or interview data, it's difficult to assess other soft skills like logical reasoning, work attitude, stress handling, or team collaboration.