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Assessing your cultural and operational fit
ttsky26a-ldo
March 21, 2026 – Present
submission of a LDO design project to TinyTapeoutSKY26a. See the link below for full documentation.
View ProjectStudent-Life-Track-2026
March 13, 2026 – Present
Student-Life-Track-2026 — GitHub repository
View Projecttt_bootcamp_common_drain
February 21, 2026 – Present
tt_bootcamp_common_drain — GitHub repository
View Project2stageCMOSOpAmp
September 10, 2025 – September 17, 2025
While ttsky25a-opamp is the repo I submitted to TinyTapeout, this repo contains ALL the design files, documentation, and data used in the process of designing the CMOS Op Amp
View Projectttsky25a-2stageCMOSOpAmp
September 6, 2025 – September 10, 2025
submission of a 2stageCMOSOpAmp design project to TinyTapeout25a run. More documentation and details can be found under 2stageCMOSOpAmp repo linked below
View Projectnano-oscillator
December 10, 2021 – September 7, 2024
Spin-Hall nano-oscillator simulation using mumax3.
View ProjectCultural Fit Analysis
The candidate's projects are primarily personal and heavily focused on hardware design (Verilog, CMOS Op Amps, LDOs), which aligns well with an FPGA Developer role. However, the overall project diversity is somewhat narrow, and there is no information on collaborative work or team environments. The experience level is 0, suggesting a junior profile, which might not be a direct fit for a senior FPGA Developer role without significant upskilling.
Soft Skills & Operational Fit
Insufficient data to assess soft skills or operational fit. No psychometric or English test results are available.